1. Field of the Invention
The present invention relates to a power control circuit, and more particularly to a power control circuit with a power off time delay circuit for delaying cut-off of an AC power supply to a microprocessor-based system.
2. Description of the Prior Art
Most of microprocessor-based systems or computer systems normally include a series of power-on and power-off sequences. The power-off or power shutdown sequence is especially important to the computer system and must be followed in order to avoid undesired loss or damage of data.
FIG. 1 is a schematic waveform diagram showing a waveform of a DC operating voltage Vcc at power-on and power-off of a microprocessor-based system, such as a personal computer device or a liquid crystal display (LCD) connected to a computer system, for data access. The DC operating voltage Vcc is typically obtained from an AC power supply of the commercial electricity via an electrical power supply system.
Ideally, when an operator powers off the computer system by manually operating a power switch, a proper shutdown sequence should enable the DC operating voltage Vcc to be normally supplied for a predetermined delay time t1 until the current data access is completely accomplished. Similarly, in a proper power-on sequence, the data access should be performed only when the operating voltage Vcc has become fully stabilized.
However, with the conventionally designed power supply circuits, the AC power supply is cut off immediately after a user turns off the power switch of the computer system. This would instantly cut off the DC operating voltage Vcc to the computer system. Once the computer system is powered off, the necessary shutdown sequence is impossible to be finished, resulting in incomplete or improper access of data.
A conventional approach of solving this problem described above is to additionally couple a known capacitor across the DC operating voltage Vcc. The capacitor is selected to have a considerable large capacitance sufficient to temporarily supply a DC power to the central processing unit of the computer system in case the AC power supply is cut off. This prior art solution enables the central processing unit to temporarily obtain a DC operating voltage Vcc, but it does not activate the whole computer system to perform the necessary shutdown sequence.
It is therefore desirable to develop a power control circuit with power off time delay control to solve the above-mentioned problems encountered in the course of shutdown of a microprocessor-based system.
Consequently, the primary object of the present invention is to provide a power control circuit with power off time delay control for the microprocessor-based system. The control circuit enables a delayed cut-off of operating voltage supplied to the microprocessor-based system when a user manually powers off the microprocessor-based system, allowing the microprocessor-based system to have sufficient time and electric power to complete the necessary data access and execute the normal shut down sequence.
Another object of the present invention is to provide a power off time delay control circuit for a computer system. A central processing unit of the computer system is designed to monitor the voltage supplying status through an operating voltage detection line. So, when an operator turns off the power switch of the computer system, the control circuit would enable supply of a normal DC operating voltage to the computer system for a predetermined time.